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 PD- 95141
IRFPS40N50LPBF
HEXFET Power MOSFET Applications * Zero Voltage Switching SMPS VDSS RDS(on) typ. Trr typ. ID * Telecom and Server Power Supplies 500V 170ns 46A 0.087 * Uninterruptible Power Supplies * Motor Control applications * Lead-Free Features and Benefits * SuperFast body diode eliminates the need for external diodes in ZVS applications. * Lower Gate charge results in simpler drive requirements. * Enhanced dv/dt capabilities offer improved ruggedness. * Higher Gate voltage threshold offers improved noise Super-247TM immunity.
Absolute Maximum Ratings
Parameter ID @ TC = 25C Continuous Drain Current, VGS @ 10V ID @ TC = 100C Continuous Drain Current, VGS @ 10V IDM Pulsed Drain Current PD @TC = 25C Power Dissipation Max. 46 29 180 540 4.3 30 34 -55 to + 150 W W/C V V/ns C 300 (1.6mm from case ) A Units
SMPS MOSFET
(R)
VGS dv/dt TJ TSTG
Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and
d
Storage Temperature Range Soldering Temperature, for 10 seconds
Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)Ac Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- --- --- --- 170 220 705 1.3 9.0 46 A 180 1.5 250 330 1060 2.0 --- V ns
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 46A, VGS = 0V TJ = 25C, IF = 46A TJ = 125C, di/dt = 100A/s
f f
f f
nC TJ = 25C, IS = 46A, VGS = 0V TJ = 125C, di/dt = 100A/s A TJ = 25C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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1
09/14/04
IRFPS40N50LPBF
Static @ TJ = 25C (unless otherwise specified)
Symbol
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS RG
Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
Min. Typ. Max. Units
500 --- --- 3.0 --- --- --- --- --- --- 0.60 --- --- --- --- --- 0.90 --- --- 5.0 50 2.0 100 -100 --- V V/C V A mA nA
Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 1mA VGS = 10V, ID = 28A
0.087 0.100
f
VDS = VGS, ID = 250A VDS = 500V, VGS = 0V VDS = 400V, VGS = 0V, TJ = 125C VGS = 30V VGS = -30V f = 1MHz, open drain
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Coss eff. (ER)
Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Effective Output Capacitance (Energy Related)
Min. Typ. Max. Units
21 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 27 170 50 69 8110 960 130 11200 240 440 310 --- 380 80 190 --- --- --- --- --- --- --- --- --- --- --- pF ns nC S
Conditions
VDS = 50V, ID = 46A ID = 46A VDS = 400V VGS = 10V, See Fig. 7 & 15 VDD = 250V ID = 46A RG = 0.85 VGS = 10V, See Fig. 14a & 14b VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 400V, = 1.0MHz VGS = 0V,VDS = 0V to 400V
f f
g
Avalanche Characteristics
Symbol
EAS IAR EAR Parameter Single Pulse Avalanche Energyd Avalanche CurrentA Repetitive Avalanche Energy Typ. --- --- --- Max. 920 46 54 Units mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA
Parameter
Junction-to-Caseh Case-to-Sink, Flat, Greased Surface Junction-to-Ambienth
Typ.
--- 0.24 ---
Max.
0.23 --- 40
Units
C/W
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11).
Pulse width 400s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS. Coss eff.(ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80% VDSS. R is measured at TJ approximately 90C
Starting TJ = 25C, L = 0.86mH, RG = 25, ISD 46A, di/dt 550A/s, VDD V(BR)DSS,
TJ 150C. IAS = 46A. (See Figure 12).
2
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IRFPS40N50LPBF
1000
I D , Drain-to-Source Current (A)
100
10
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM4.5V TOP
10
4.5V
1
4.5V
0.1
1
0.01 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance (Normalized)
1000
3.0
ID = 47A
I D , Drain-to-Source Current (A)
2.5
100
TJ = 150 C
2.0
10
1.5
TJ = 25 C
1
1.0
0.5
0.1
V DS= 50V 20s PULSE WIDTH 4 5 6 7 8 9 10 11
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
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3
IRFPS40N50LPBF
1000000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
40 35 30
100000
C, Capacitance(pF)
Ciss
Energy (J)
1000
10000
25 20 15 10 5
1000
Coss
100
Crss
10 1 10 100
0 0 100 200 300 400 500 600
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typ. Output Capacitance Stored Energy vs. VDS
20
ID = 47A V DS= 400V V DS= 250V V DS= 100V
1000
VGS , Gate-to-Source Voltage (V)
15
ISD , Reverse Drain Current (A)
100
TJ = 150 C
10
10
TJ = 25 C
1
5
0 0 100 200 300 400
0.1 0.2
V GS = 0 V
0.7 1.2 1.7 2.2
QG , Total Gate Charge (nC)
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Gate Charge vs. Gate-to-Source Voltage
Fig 8. Typical Source-Drain Diode Forward Voltage
4
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IRFPS40N50LPBF
50
V DS VGS
RD
40
ID , Drain Current (A)
RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
30
20
Fig 10a. Switching Time Test Circuit
10
VDS 90%
0
25
50
75
100
125
150
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response(Z thJC )
0.1
D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFPS40N50LPBF
OPERATION IN THIS AREA LIMITED BY RDS(on)
EAS , Single Pulse Avalanche Energy (mJ)
1000
2000
TOP BOTTOM
ID , Drain Current (A)
ID 21A 30A 46A
1500
100
10us
100us 10
1000
1ms
500
1
TC = 25 C TJ = 150 C Single Pulse
10 100
10ms
1000
VDS , Drain-to-Source Voltage (V)
0 25 50 75 100 125 150
Starting T , Junction Temperature( C) J
Fig 12. Maximum Safe Operating Area
Fig 13. Maximum Avalanche Energy vs. Drain Current
15V
V(BR)DSS
VDS L
DRIVER
tp
RG
20V
D.U.T
IAS tp
+ V - DD
A
0.01
I AS
Fig 14a. Unclamped Inductive Test Circuit
Current Regulator Same Type as D.U.T.
Fig 14b. Unclamped Inductive Waveforms
50K 12V .2F .3F
QG
VGS
D.U.T. + V - DS
QGS VG
QGD
VGS
3mA
IG
ID
Current Sampling Resistors
Charge
Fig 15a. Gate Charge Test Circuit
Fig 15b. Basic Gate Charge Waveform
6
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IRFPS40N50LPBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ V DD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 16. For N-Channel HEXFET(R) Power MOSFETs
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7
Case Outline and Dimensions -- Super-247
IRFPS40N50LPBF
Super-247 (TO-274AA) Part Marking Information
EXAMPLE: THIS IS AN IRFPS37N50A WITH ASSEMBLY LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" PART NUMBER INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
IRFPS37N50A 719C 17 89
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
Note: "P" in assembly line position indicates "Lead-Free"
TOP
Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.09/04
8
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